Freescale Semiconductor /MK80F25615 /MCG /C5

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Interpret as C5

7 43 0 0 00 0 0 0 0 0 0 0 0PRDIV0 (0)PLLSTEN 0 (0)PLLCLKEN

PLLCLKEN=0, PLLSTEN=0

Description

MCG Control 5 Register

Fields

PRDIV

PLL External Reference Divider

PLLSTEN

PLL Stop Enable

0 (0): MCGPLLCLK and MCGPLLCLK2X are disabled in any of the Stop modes.

1 (1): MCGPLLCLK and MCGPLLCLK2X are enabled if system is in Normal Stop mode.

PLLCLKEN

PLL Clock Enable

0 (0): MCGPLLCLK is inactive.

1 (1): MCGPLLCLK is active.

Links

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